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Pretty good explanation of x86-64 by HP



 
 
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  #1  
Old December 5th 04, 06:02 AM
Yousuf Khan
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Default Pretty good explanation of x86-64 by HP

I found this whitepaper from HP to be pretty good, it is surprisingly
candid, considering HP was the coinventor of the Itanium. It does a
pretty good job of explaining and summarizing the similarities and
differences between AMD64 and EM64T, and their comparison to the
Itanium's IA64 instruction set. AMD64 and EM64T are "broadly
compatible", but IA64 is a different animal altogether.

Yousuf Khan

http://h200001.www2.hp.com/bc/docs/s.../c00238028.pdf
  #2  
Old December 5th 04, 06:44 AM
Bill Bradley
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Default

Yousuf Khan wrote:
I found this whitepaper from HP to be pretty good, it is surprisingly
candid, considering HP was the coinventor of the Itanium. It does a
pretty good job of explaining and summarizing the similarities and
differences between AMD64 and EM64T, and their comparison to the
Itanium's IA64 instruction set. AMD64 and EM64T are "broadly
compatible", but IA64 is a different animal altogether.

Yousuf Khan

http://h200001.www2.hp.com/bc/docs/s.../c00238028.pdf


When did the non-Xeon Prescott P4s start offering EMT64 as listed in
the paper? News to me. Does HP know something the rest of the world
doesn't?

Bill
  #3  
Old December 5th 04, 11:21 AM
George Macdonald
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Default

On Sun, 05 Dec 2004 01:02:11 -0500, Yousuf Khan wrote:

I found this whitepaper from HP to be pretty good, it is surprisingly
candid, considering HP was the coinventor of the Itanium. It does a
pretty good job of explaining and summarizing the similarities and
differences between AMD64 and EM64T, and their comparison to the
Itanium's IA64 instruction set. AMD64 and EM64T are "broadly
compatible", but IA64 is a different animal altogether.

Yousuf Khan

http://h200001.www2.hp.com/bc/docs/s.../c00238028.pdf


Hmm and the following quote: "However, the latency difference between local
and remote accesses is actually very small because the memory controller is
integrated into and operates at the core speed of the processor, and
because of the fast interconnect between processors." is relevant to
another discussion here. I wish we could get a firm answer on this one.

Rgds, George Macdonald

"Just because they're paranoid doesn't mean you're not psychotic" - Who, me??
  #4  
Old December 5th 04, 05:37 PM
Rob Stow
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Default

George Macdonald wrote:
On Sun, 05 Dec 2004 01:02:11 -0500, Yousuf Khan wrote:


I found this whitepaper from HP to be pretty good, it is surprisingly
candid, considering HP was the coinventor of the Itanium. It does a
pretty good job of explaining and summarizing the similarities and
differences between AMD64 and EM64T, and their comparison to the
Itanium's IA64 instruction set. AMD64 and EM64T are "broadly
compatible", but IA64 is a different animal altogether.

Yousuf Khan

http://h200001.www2.hp.com/bc/docs/s.../c00238028.pdf



Hmm and the following quote: "However, the latency difference between local
and remote accesses is actually very small because the memory controller is
integrated into and operates at the core speed of the processor, and
because of the fast interconnect between processors." is relevant to
another discussion here. I wish we could get a firm answer on this one.


Not sure if this is exactly what you are looking for in the
way of a "firm answer", but the latencies in a Opteron system a

0 hops 80 ns uniprocessor (Local access)
100 ns multiprocessor (Local access, with cache snooping on other processors)
1 hop 115 ns
2 hops 150 ns
3 hops 190 ns

I couldn't find my original source for those numbers, and
the two and three hop numbers above are a little higher
than I remembered them as being. This time around I got
them from this thread:
http://www.aceshardware.com/forum?read=80030960

That thread refers to this article:
http://www.digit-life.com/articles2/amd-hammer-family/
which gives slightly different numbers for a 2 GHz Opteron
with DDR333:
Uni-processor system: 45 ns
Dual-processor system: 0-hop - 69 ns, 1-hop - 117 ns.
Four-processor system: 0-hop - 100 ns, 1-hop - 118 ns, 2-hop - 136 ns.


I don't know if any of the numbers above are for cache misses
or if they are averages that include both hits and misses.
  #5  
Old December 5th 04, 06:16 PM
Hamman
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Default


"Bill Bradley" wrote in message
nk.net...
Yousuf Khan wrote:
I found this whitepaper from HP to be pretty good, it is surprisingly
candid, considering HP was the coinventor of the Itanium. It does a
pretty good job of explaining and summarizing the similarities and
differences between AMD64 and EM64T, and their comparison to the
Itanium's IA64 instruction set. AMD64 and EM64T are "broadly compatible",
but IA64 is a different animal altogether.

Yousuf Khan

http://h200001.www2.hp.com/bc/docs/s.../c00238028.pdf


When did the non-Xeon Prescott P4s start offering EMT64 as listed in the
paper? News to me. Does HP know something the rest of the world
doesn't?

Bill


www.overclockers.co.uk had some a few weeks back, and htey sold very quikly.
I think theres a few more in now.

hamman


  #6  
Old December 5th 04, 07:42 PM
Tony Hill
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Default

On Sun, 05 Dec 2004 06:44:31 GMT, Bill Bradley
wrote:

Yousuf Khan wrote:
I found this whitepaper from HP to be pretty good, it is surprisingly
candid, considering HP was the coinventor of the Itanium. It does a
pretty good job of explaining and summarizing the similarities and
differences between AMD64 and EM64T, and their comparison to the
Itanium's IA64 instruction set. AMD64 and EM64T are "broadly
compatible", but IA64 is a different animal altogether.

Yousuf Khan

http://h200001.www2.hp.com/bc/docs/s.../c00238028.pdf


When did the non-Xeon Prescott P4s start offering EMT64 as listed in
the paper? News to me. Does HP know something the rest of the world
doesn't?


Not that they know something the rest of the world doesn't, just that
they have access to processors that most of us do not. IBM sells them
as well, but for the time being Intel will ONLY sell them for use in
servers. Why? I really don't know. Maybe it's just a bit too much
crow for them to eat after saying (only a bit over a year ago) that
64-bit wouldn't be useful for the desktop until the end of the year?

-------------
Tony Hill
hilla underscore 20 at yahoo dot ca
  #7  
Old December 5th 04, 07:47 PM
Patrick Schaaf
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Default

Tony Hill writes:

Not that they know something the rest of the world doesn't, just that
they have access to processors that most of us do not. IBM sells them
as well, but for the time being Intel will ONLY sell them for use in
servers. Why? I really don't know. Maybe it's just a bit too much
crow for them to eat after saying (only a bit over a year ago) that
64-bit wouldn't be useful for the desktop until the end of the year?


How much does Intel stockpile? Could it be that they have warehouses
full of already produced non-64-bit processors, and those want to be
sold at the projected prices, not thrown away?

best regards
Patrick
  #8  
Old December 5th 04, 09:25 PM
Yousuf Khan
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Posts: n/a
Default

Bill Bradley wrote:
When did the non-Xeon Prescott P4s start offering EMT64 as listed in
the paper? News to me. Does HP know something the rest of the world
doesn't?


It must have been at least two or three months now, I posted a message
about it in one of these newsgroups.

Google Search: g:thl403337196d
http://groups.google.ca/groups?q=g:t...e .rogers.com

or,

http://tinyurl.com/6tnjy

Yousuf Khan
  #9  
Old December 5th 04, 09:30 PM
Yousuf Khan
external usenet poster
 
Posts: n/a
Default

George Macdonald wrote:
Hmm and the following quote: "However, the latency difference between local
and remote accesses is actually very small because the memory controller is
integrated into and operates at the core speed of the processor, and
because of the fast interconnect between processors." is relevant to
another discussion here. I wish we could get a firm answer on this one.


Yeah, but that's why I think AMD insists on calling their multiprocessor
connection scheme as SUMO (Sufficiently Uniform Memory Organization),
rather than NUMA. It's not worth headaching over such small differences
in latency, is basically what they're saying.

Yousuf Khan
  #10  
Old December 5th 04, 10:57 PM
Bob Niland
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Default

Patrick Schaaf wrote:

How much does Intel stockpile?


Well, according to the Reg,
http://www.theregister.co.uk/2004/12/03/intel_eol_p2/
they just finally announced EOL for the Pentium-II.

"The Register reveals that you'll be able to continue
ordering the part for a year, with the last trays
leaving the chip giant's Pentium II warehouse on
1 June 2006."

Could it be that they have warehouses full of already
produced non-64-bit processors, and those want to be
sold at the projected prices, not thrown away?


Whether there is any connection between your hypothesis
and the Reg news, is left as an exercise for the reader :-)

--
Regards, Bob Niland
http://www.access-one.com/rjn email4rjn AT yahoo DOT com
NOT speaking for any employer, client or Internet Service Provider.
 




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