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processor arcitecture
I'm not an Engl. native-speaker, that's why I'm asking:
I'd like to know what means 'pipeline' (e.g. 16-bit pipeline) in processor knowledge. Is it a bus or it is a register meant about. |
#2
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piotr wrote:
I'm not an Engl. native-speaker, that's why I'm asking: I'd like to know what means 'pipeline' (e.g. 16-bit pipeline) in processor knowledge. Is it a bus or it is a register meant about. Hi, A pipeline is not a "bit" mesure, it's a depth. You know the path of an instruction into the CPU before being executed is very long : the cpu has to fetch it from memory to cache, from cache to execution buffer, to decode it (understand what's it's going to do), guess the next instruction pointer, lock the used registers, then execute it and put back the results in the registers/memory if they are still coherent. All of these can take like 20 clock cycles. It's a lot too much. That's why instead of doing all of this in one clock cycle (it's not possible) the cpu makes a pipeline containing instructions, and at each cycle, each instruction leaves one pipeline state to another. with that trick, the cpu virtually executes 1 instruction per clock cycle. There are still problems like registers interlocking (2 instructions in the pipeline need the same registers for writing) or path changes (the instruction in the pipeline says to change the instruction pointer, so we guess it but it was no chance the program jumped somewhere else and all pipeline results had to be discarded. For instance, athlon64 has 3 independant pipelines meaning you can do 3 things at once if you don't use the same registers, with one cycle. Regards, Aris |
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