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#1
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PC 4GB RAM limit
The cheaper motherboards (ie. most of them) for P4 or Athlon 64 support a
maximum of 4GB RAM, even if the motherboards and processors support the AMD64 extensions that can address sqillions of GB. On the other hand, more upmarket boards support more RAM - up to 24GB or maybe more - for Xeon and Opteron. If you buy one of these 4GB boards and install 4GB RAM, you don't get the use of all of it. The top of the 4GB address space gets shadowed by system functions such as PCI Express addressing. This is not just a small detail - typically you lose 1GB of your 4GB. See: http://www.itwriting.com/blog/?postid=152 I can't at the moment find a clear explanation of this. I understand about the shadowing, but the question of course is why a modern board can't use a higher range of addresses to make the full 4GB available to the OS. The manufacturers mutter about "PC Architecture", but then again they also make boards that *do* overcome this limit. With PAE, PC processors have been able to address more than 4GB for years. So why are we still running into this limit? Tim |
#2
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"Tim Anderson" wrote in message ...
The cheaper motherboards (ie. most of them) for P4 or Athlon 64 support a maximum of 4GB RAM, even if the motherboards and processors support the AMD64 extensions that can address sqillions of GB. On the other hand, more upmarket boards support more RAM - up to 24GB or maybe more - for Xeon and Opteron. If you buy one of these 4GB boards and install 4GB RAM, you don't get the use of all of it. The top of the 4GB address space gets shadowed by system functions such as PCI Express addressing. This is not just a small detail - typically you lose 1GB of your 4GB. See: http://www.itwriting.com/blog/?postid=152 I can't at the moment find a clear explanation of this. I understand about the shadowing, but the question of course is why a modern board can't use a higher range of addresses to make the full 4GB available to the OS. The manufacturers mutter about "PC Architecture", but then again they also make boards that *do* overcome this limit. With PAE, PC processors have been able to address more than 4GB for years. So why are we still running into this limit? Because *applications* have to be written to be PAE-aware, and have to be written in 64-bit address space to make use of anything over 4GB. This was (and still is) very much a niche market -- very few desktop/workstation users will come close to using 2GB, let alone 4, which is why MS originally split the 4GB address range between 2GB user space and 2GB system space. |
#3
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"Rick" wrote in message
t... Because *applications* have to be written to be PAE-aware, and have to be written in 64-bit address space to make use of anything over 4GB. This was (and still is) very much a niche market -- very few desktop/workstation users will come close to using 2GB, let alone 4, which is why MS originally split the 4GB address range between 2GB user space and 2GB system space. Rick, Thanks for the response. I understand about that; what I'm talking about is the hardware issue. When you boot with 4GB installed on one of these motherboards, typically 1GB is not made available to the OS at all; it is "consumed" before the OS boots (because of address shadowing). Even with an AMD64 (EM64T) CPU installed. Tim |
#4
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"Tim Anderson" wrote in message news
"Rick" wrote in message t... Because *applications* have to be written to be PAE-aware, and have to be written in 64-bit address space to make use of anything over 4GB. This was (and still is) very much a niche market -- very few desktop/workstation users will come close to using 2GB, let alone 4, which is why MS originally split the 4GB address range between 2GB user space and 2GB system space. Rick, Thanks for the response. I understand about that; what I'm talking about is the hardware issue. When you boot with 4GB installed on one of these motherboards, typically 1GB is not made available to the OS at all; it is "consumed" before the OS boots (because of address shadowing). Even with an AMD64 (EM64T) CPU installed. The Intel D915PBL (the board referenced in your link) is a desktop board: ftp://download.intel.com/design/moth...l/C6859901.pdf The board utilizes 4 GB of addressable system memory. Typically the address space that is allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (firmware hub), and chipset overhead resides above the top of DRAM (total system memory). On a system that has 4 GB of system memory installed, it is not possible to use all of the installed memory due to system address space being allocated for other system critical functions. These functions include the following: BIOS/firmware hub (2 MB) Local APIC (19 MB) Digital Media Interface (40 MB) Front side bus interrupts (17 MB) PCI Express configuration space (256 MB) MCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB) Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI Express add-in cards The amount of installed memory that can be used will vary based on add-in cards and BIOS settings. Figure 14 shows a schematic of the system memory map. All installed system memory can be used when there is no overlap of system addresses. |
#5
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Thanks again Rick; yes, I'm familiar with that document and I've read it
before. My question was, to quote from my original message: "I can't at the moment find a clear explanation of this. I understand about the shadowing, but the question of course is why a modern board can't use a higher range of addresses to make the full 4GB available to the OS. The manufacturers mutter about "PC Architecture", but then again they also make boards that *do* overcome this limit. With PAE, PC processors have been able to address more than 4GB for years. So why are we still running into this limit?" Tim |
#6
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In article ,
Rick wrote: "Tim Anderson" wrote in message ... The cheaper motherboards (ie. most of them) for P4 or Athlon 64 support a maximum of 4GB RAM, even if the motherboards and processors support the AMD64 extensions that can address sqillions of GB. On the other hand, more upmarket boards support more RAM - up to 24GB or maybe more - for Xeon and Opteron. If you buy one of these 4GB boards and install 4GB RAM, you don't get the use of all of it. The top of the 4GB address space gets shadowed by system functions such as PCI Express addressing. This is not just a small detail - typically you lose 1GB of your 4GB. See: http://www.itwriting.com/blog/?postid=152 I can't at the moment find a clear explanation of this. I understand about the shadowing, but the question of course is why a modern board can't use a higher range of addresses to make the full 4GB available to the OS. The manufacturers mutter about "PC Architecture", but then again they also make boards that *do* overcome this limit. With PAE, PC processors have been able to address more than 4GB for years. So why are we still running into this limit? Because *applications* have to be written to be PAE-aware, and have to be written in 64-bit address space to make use of anything over 4GB. This was (and still is) very much a niche market -- very few desktop/workstation users will come close to using 2GB, let alone 4, which is why MS originally split the 4GB address range between 2GB user space and 2GB system space. Real (tm) operating systems, such as VMS, have done something splitting the address space this for decades. What OS were you running? So what happens on a dual CPU opteron system with 8 memory slots (and a 64 bit OS)? I think you'll find that on a PAE mobo the CPU never sees a hardware address higher than the 4GB limit. Hardware registers external to the CPU are set by the PAE drivers and memory mapping is done to show different segments of physical memory to the CPU. What OS are you using, -- a d y k e s @ p a n i x . c o m Don't blame me. I voted for Gore. |
#7
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"Al Dykes" wrote in message
... Real (tm) operating systems, such as VMS, have done something splitting the address space this for decades. What OS were you running? This is not an OS issue, the memory is made unavailable before the OS boots. But for the record, dual boot Win XP x64 and Suse Linux 9.3 64-bit. So what happens on a dual CPU opteron system with 8 memory slots (and a 64 bit OS)? That's what I'm wondering, as these systems support more than 4GB RAM successfully. Tim |
#8
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Rick writes:
These functions include the following: BIOS/firmware hub (2 MB) Local APIC (19 MB) Digital Media Interface (40 MB) Front side bus interrupts (17 MB) PCI Express configuration space (256 MB) MCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB) Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI Express add-in cards Looks like PCI Express is a staggering waste of memory space. -- Transpose hotmail and mxsmanic in my e-mail address to reach me directly. |
#9
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"Mxsmanic" wrote in message
... Rick writes: Looks like PCI Express is a staggering waste of memory space. Yes, PCI Express is the main guilty party here. But *why* does this address space have to be in the first 4GB? Sounds like a 32-bit issue; but especially for boards that support AMD64 this is all very unfortunate. Tim |
#10
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Tim Anderson wrote:
"Rick" wrote in message Because *applications* have to be written to be PAE-aware, and have to be written in 64-bit address space to make use of anything over 4GB. This was (and still is) very much a niche market -- very few desktop/workstation users will come close to using 2GB, let alone 4, which is why MS originally split the 4GB address range between 2GB user space and 2GB system space. Thanks for the response. I understand about that; what I'm talking about is the hardware issue. When you boot with 4GB installed on one of these motherboards, typically 1GB is not made available to the OS at all; it is "consumed" before the OS boots (because of address shadowing). Even with an AMD64 (EM64T) CPU installed. Because once you assign a group of memory addresses for non-memory (i.e. i/o) use you have to decode that range. Not only do you have to designate a range for i/o, you also have to designate the complementary range for actual memory. The decoders involve added loads on the address lines, and added propagation delay. So you want to minimize the bits used in this, and possibly strengthen their output buffers on the CPU chip. All of which costs time, power, and performance. I expect the main problems are due to the added capacitance from added fan-out. This is similar to the often encountered difficulties when further memory modules are added to a system. All of this deals with the physical addresses, not the virtual addresses that the software sees. -- Chuck F ) ) Available for consulting/temporary embedded and systems. http://cbfalconer.home.att.net USE worldnet address! |
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