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#31
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Michael Brown wrote:
HT (HyperTransport) is the memory link between an AMD CPU with an integrated memory controller and the memory. Umm, no. The HT link is between the AMD CPU and the southbridge. Memory comes off the CPU itself and has nothing to do with hypertransport. If you're going to be picky, make sure you're right Okay, so I blew it! Do I get forty lashes with a wet noodle? I realized my mistake later while thinking about it, but couldn't get back to the computer until now. I apologize for the error of my ways! |
#32
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On Mon, 07 Feb 2005 18:23:23 +1300, Michael Brown wrote:
I think with the K8, or any HT-based system, the terms northbridge and (and possibly southbridge as well) can't really be used. You just have a daisy-chained series of devices. For example, the ALi "northbridge" is nothing more than an hypertransport tunnel with an AGP interface (in fact it's just a rebadged AMD 8151, which is called a "Hypertransport AGP tunnel" by AMD). The SiS and Via "nortbridges" are pretty much the same thing feature-wise, though also feature a interconnect translater (to VLink to Mutiol). There's only one difference between the K8 and previous x86 cpu's conserning the northbridge, and that's that the memory controller has been moved off the northbridge and onto the cpu. This along with the cpu's extra HT links is what enhances performance in both single and multicore systems. All other functions of the standard north/south bridge system are still there. They still use the same achitecture, etc. It's just they have a faster system bus because the system bus is now an HT link bus. So what is the system bus? It's just another name for FSB and it does the same thing as the FSB in previous K6, K7, etc cpu's except for the memory controllers. It controls IO to all other external devices through the north/south bridge, with the exception of memory. This includes AGP, PCI, PCI-E, mouse/keyboard, and whatever else the chipset manufacturer wants to pack into it, generally called the feature set. The chipset manufactures have not changed the name of these devices to confuse people. And that keeps it simple, and I agree. OTOH, many people now think the K8 doesn't have a FSB when in fact the name FSB name has just been dropped in favor of calling it just the system bus, which is fine with me as it was also called this in the K7 series if you get right down to it. So in the K7 the cpu, connected to all other devices through the FSB to the northbridge and then the southbridge (including system ram). The K8 does the exact same thing with these exceptions. The memory and only the memory connects direct to the cpu instead of the northbridge. That they now call the FSB only the system bus is fine. Even calling it the HT bus/link is fine with me too as long as everyone realizes that there can be more than one HT link in a system, serving totally different functions. System bus is much more specific. And since the chipset manufacturers decided not to change what they call the chipset (northbridge/southbridge) who am I to argue with them. It only makes sense to me. The fact that the system bus is now serial instead of parelell really has doesn't matter to me. It's still the system bus only much faster using a different architechture. While we may never agree on this terminology it's what it is, and I hope others lurking will learn something from this thread. -- Abit KT7-Raid (KT133) Tbred B core CPU @2400MHz (24x100FSB) http://wesnewell.no-ip.com/cpu.htm |
#33
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SiS755
( North Bridge Chipset ) SiS Chipset Supports AGP8X for AMD Athlon 64 Platform http://www.sis.com/products/chipsets...hlon64/755.htm SIS calls their link between the north adn south Multitol. VIA, something else and others yet something else. It's still a seperate bus in any case. Interesting. Wes, has your computer been complaining to you lately? According to SIS, they have Hypertransport *complaint* bus driver technology. lol DougH |
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