Muhammad Khan wrote:
I want to use the signal defined in one architecture in VHDL to
another architecture. I have two architecture in the same .vhd file
and I am using Component mapping. I required the result of calculation
of a signal to be used in second architecture. Can any one tell how to
defined signal so that it is globally visible to other architectures.
Hello Muhammad,
this is a common question.
The clean way for handling this is to feed the signal through
the port maps.
Regards,
Mario
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Digital Force / Mario Trams
Chemnitz University of Technology http://www.tu-chemnitz.de/~mtr
Dept. of Computer Science Tel.: (+49) 371 531 1660
Chair of Computer Architecture Fax.: (+49) 371 531 1818
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