IO caching in Intel
Hello,
The programmers manual(IA-32/64) for Intel says, that IO is not cached. Does this mean that say, when an ethernet packet comes in it does not get cached in the core's cache? Thanks. |
IO caching in Intel
wrote in message ups.com...
Hello, The programmers manual(IA-32/64) for Intel says, that IO is not cached. Does this mean that say, when an ethernet packet comes in it does not get cached in the core's cache? It means addressable PCI space in not cached, like NIC buffers and display RAM. |
IO caching in Intel
Eric Gisin wrote:
wrote in message ups.com... Hello, The programmers manual(IA-32/64) for Intel says, that IO is not cached. Does this mean that say, when an ethernet packet comes in it does not get cached in the core's cache? It means addressable PCI space in not cached, like NIC buffers and display RAM. Are you sure? My assumption would be that it means that the IO port address space is not cached; the processor has no internal way of knowing whether something in the regular memory address space is memory-mapped IO (PCI or otherwise)... that's why you have MTRRs (memory type range registers, IIRC) which have to be set by the OS or BIOS. -- Nate Edel http://www.cubiclehermit.com/ "What's the use of yearning for Elysian Fields when you know you can't get 'em, and would only let 'em out on building leases if you had 'em?" (WSG) |
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