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[email protected] June 4th 18 04:56 AM

Intel's Cannon Lake (10 nm) delayed
 
LONG time coming. Samsung is making 10 nm stuff, but Intel claims their
10 nm is denser than Samsung's. It seems Intel, AMD, Samsung have different
definitions of nm lithography.
So far, there is a mobile i3. I await something with more grunt.
Running Skylake-X on sustained AVX-512 will almost melt your fans and blow
your fuses. I am hoping that Cannon Lake can do the job with a little less
power.


Paul[_28_] June 4th 18 05:41 AM

Intel's Cannon Lake (10 nm) delayed
 
wrote:
LONG time coming. Samsung is making 10 nm stuff, but Intel claims their
10 nm is denser than Samsung's. It seems Intel, AMD, Samsung have different
definitions of nm lithography.
So far, there is a mobile i3. I await something with more grunt.
Running Skylake-X on sustained AVX-512 will almost melt your fans and blow
your fuses. I am hoping that Cannon Lake can do the job with a little less
power.


The node definition is a bit disingenuous. If you do the area
calcs and compare areas and dimensions, the "node name" doesn't
seem to mean a lot.

https://semiengineering.com/a-node-by-any-other-name/

http://semiengineering.com/wp-conten...8.04.42-AM.png

You can see pictures of trigate finfets here. One of the
things Intel did after the PressHot era, was to add a feature
to its transistors, so "low performance" portions of the chip
could have their totem pole leakage current gated off. The
Prescott wasted about 25% of the DC power going into it as
heat. Later transistor redesigns, reduced that leakage.

https://www.researchgate.net/publica...metal-gate_CPU

I don't think you should expect any miracles on power.
In case you hadn't noticed, AMD is trying to "sneak up"
on Intel, with this years Ryzen version. They're shooting
to outdo one another on clock. And this means Intel
will be pushing power to the wall (the platform limit),
to shove AMD aside. Only wimpy laptops will be able to
gain some battery life, from the latest lithography.

Paul


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