memory mapped IO: device registers mapped to virtual memory or physical memory?
 

Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

Thanks,

- Olumide

memory mapped IO: device registers mapped to virtual memory orphysical memory?
 

Olumide wrote:
Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

Thanks,

- Olumide

Device registers have a "physical" address that can be mapped into
virtual memory using normal paging techniques, AFAIK.

memory mapped IO: device registers mapped to virtual memory or physical memory?
 

"Eli Gottlieb" wrote in message
...
Olumide wrote:
Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

Thanks,

- Olumide

Device registers have a "physical" address that can be mapped into virtual
memory using normal paging techniques, AFAIK.

Correct for real, physical devices in non-virtualized environments. If we go
for virtual ones, we may never know what is real and what is emulated in
some way (e.g. a page fault handler would do the emulation).

Alex

memory mapped IO: device registers mapped to virtual memory orphysical memory?
 

Olumide wrote On 02/01/06 10:49,:
Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

How could device registers inhabit virtual memory?
That'd require every device to be sensitive to the MMU,
would insert the device registers into every process'
address space, would make machines with multiple CPUs
(more specifically, multiple MMUs) either impossible or
woefully inefficient, would make it impossible or very
difficult to change MMU settings while any device was
active, and would bring about the end of civilization as
we know it ;-) Device registers inhabit physical memory
space; devices that do DMA generally do so to and from
physical-memory buffers.

That said, the CPU usually reads and writes virtual
addresses that are translated to physical addresses by
the MMU. So if the CPU is to access device registers,
it must configure the MMU so that it has a virtual-to-
physical mapping that associates some virtual address
with the physical address of the target register. In
that sense, device registers inhabit virtual memory --
but in that sense, RAM inhabits virtual memory, too.

--

memory mapped IO: device registers mapped to virtual memory orphysical memory?
 

Alexei A. Frounze wrote:
"Eli Gottlieb" wrote in message
...

Olumide wrote:

Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

Thanks,

- Olumide


Device registers have a "physical" address that can be mapped into virtual
memory using normal paging techniques, AFAIK.


Correct for real, physical devices in non-virtualized environments. If we go
for virtual ones, we may never know what is real and what is emulated in
some way (e.g. a page fault handler would do the emulation).

Alex


Is virtualization so common now that we actually bother to think about
it? Theoretically, the same software should run on both. If it
doesn't, then I see no point in the virtualization, as it would just be
the creation of an arbitrary hardware platform that doesn't have any
real hardware.

memory mapped IO: device registers mapped to virtual memory or physical memory?
 

They are mapped to physical by hardware, and then also to virtual by the
OS - by a call like Windows's MmMapIoSpace.

--
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation

http://www.storagecraft.com

"Olumide" wrote in message
oups.com...
Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

Thanks,

- Olumide

memory mapped IO: device registers mapped to virtual memory or physical memory?
 

Eric Sosman wrote:
How could device registers inhabit virtual memory?
That'd require every device to be sensitive to the MMU,
would insert the device registers into every process'
address space, would make machines with multiple CPUs
(more specifically, multiple MMUs) either impossible or
woefully inefficient, would make it impossible or very
difficult to change MMU settings while any device was
active, and would bring about the end of civilization as
we know it ;-) Device registers inhabit physical memory
space; devices that do DMA generally do so to and from
physical-memory buffers.

That said, the CPU usually reads and writes virtual
addresses that are translated to physical addresses by
the MMU. So if the CPU is to access device registers,
it must configure the MMU so that it has a virtual-to-
physical mapping that associates some virtual address
with the physical address of the target register. In
that sense, device registers inhabit virtual memory --
but in that sense, RAM inhabits virtual memory, too.

Thanks Eric!

memory mapped IO: device registers mapped to virtual memory or physical memory?
 

Eric Sosman wrote:
How could device registers inhabit virtual memory?
That'd require every device to be sensitive to the MMU,
would insert the device registers into every process'
address space, would make machines with multiple CPUs
(more specifically, multiple MMUs) either impossible or
woefully inefficient, would make it impossible or very
difficult to change MMU settings while any device was
active, and would bring about the end of civilization as
we know it ;-) Device registers inhabit physical memory
space; devices that do DMA generally do so to and from
physical-memory buffers.

That said, the CPU usually reads and writes virtual
addresses that are translated to physical addresses by
the MMU. So if the CPU is to access device registers,
it must configure the MMU so that it has a virtual-to-
physical mapping that associates some virtual address
with the physical address of the target register. In
that sense, device registers inhabit virtual memory --
but in that sense, RAM inhabits virtual memory, too.

Thanks Eric!

memory mapped IO: device registers mapped to virtual memory or physical memory?
 

"Eli Gottlieb" wrote in message
...
Alexei A. Frounze wrote:
"Eli Gottlieb" wrote in message
...

Olumide wrote:

Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

Thanks,

- Olumide


Device registers have a "physical" address that can be mapped into
virtual memory using normal paging techniques, AFAIK.


Correct for real, physical devices in non-virtualized environments. If we
go for virtual ones, we may never know what is real and what is emulated
in some way (e.g. a page fault handler would do the emulation).

Alex


Is virtualization so common now that we actually bother to think about it?

It starts gaining some real importance in the business solutions (putting a
few servers that would otherwise run on different machines to one; untying
from particular hardware and making it possible to move the server to
another machine in a matter of minutes (well, maybe a few hours), to
replicate it, to back it up, to do all kinds of things that would otherwise
be hard to do with something real). And then there are applications for
which running in a virtualized environment is more secure (think of the
internet browser with all its bugs and vulnerables).

Theoretically, the same software should run on both.

Right.

If it doesn't, then I see no point in the virtualization, as it would just
be the creation of an arbitrary hardware platform that doesn't have any
real hardware.

You may underestimate it. While it doesn't make sense now, it may make a lot
of sence some time later. But as I told you, untying the software from the
particular devices makes it more portable.

Alex

memory mapped IO: device registers mapped to virtual memory or physical memory?
 

In article ,
Eric Sosman writes:


Olumide wrote On 02/01/06 10:49,:
Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

How could device registers inhabit virtual memory?
That'd require every device to be sensitive to the MMU,
would insert the device registers into every process'
address space, would make machines with multiple CPUs
(more specifically, multiple MMUs) either impossible or
woefully inefficient, would make it impossible or very
difficult to change MMU settings while any device was
active, and would bring about the end of civilization as
we know it ;-) Device registers inhabit physical memory
space; devices that do DMA generally do so to and from
physical-memory buffers.

Look up DVMA (Direct Virtual Memory Access). Some systems
allow devices to deal in virtual memory addresses, passing
their address requests through the MMU to resolve them.
That means that a mapping of not necessarily contigous
physical pages to a contiguous range of virtual memory
can be done, and the device doesn't need to be able to
do scatter/gather operations (list of pages to transfer
to/from all at once). The old sun4m (SPARC/Sbus) systems
typically worked like that.

However, that may well be fairly unusual; many systems
may well require the device to work in terms of physical
memory addresses; but as long as the OS hides all this
from the application, unless you're writing a device
driver, it shouldn't be a big deal one way or the other.

That said, the CPU usually reads and writes virtual
addresses that are translated to physical addresses by
the MMU. So if the CPU is to access device registers,
it must configure the MMU so that it has a virtual-to-
physical mapping that associates some virtual address
with the physical address of the target register. In
that sense, device registers inhabit virtual memory --
but in that sense, RAM inhabits virtual memory, too.

Well, between the device possibly being able to reference
virtual memory addresses, and the user program being able
to reference virtual memory addresses to access the device,
unless you're writing kernel code, the distinction hardly
matters, does it?

All this could indeed get more complicated on a multiprocessor
system, which is why designing them so that multithreaded
apps scale almost linearly with number of CPUs is so difficult.

--
http://www.smart.net/~rlhamil

Lasik/PRK theme music:
"In the Hall of the Mountain King", from "Peer Gynt"